Intel SIMD `v3.0.0`

IMCI

major

3

IMCI

minor

0

IMCI

patch

0

IMCI

suffix

—

No suffix

Metadata

Property	Value
Name	IMCI
Introduced	2012
First implemented by	Xeon Phi (Knights Corner)
Registers	32 × 512-bit
Operations	512-bit vectors (incompatible with AVX-512)
Source	Curated (simd.json)

Uses (dependencies)

No dependencies.

Used by (8)

Intel Manycore CPU (8)

v0.0.1-A Xeon Phi Coprocessor 3120A
v0.0.1-P Xeon Phi Coprocessor 3120P
v0.1.0-P Xeon Phi Coprocessor 5110P
v0.1.1-D Xeon Phi Coprocessor 5120D
v0.2.0-A Xeon Phi Coprocessor 7120A
v0.2.0-D Xeon Phi Coprocessor 7120D
v0.2.0-P Xeon Phi Coprocessor 7120P
v0.2.0-X Xeon Phi Coprocessor 7120X

Changelog

Since the previous major (previous generation): Intel SIMD `v2.0.0` (AVX)

Components

−SIMD v1.4.1 (SSE4.2)

Specifications

~First implemented by: Sandy Bridge → Xeon Phi (Knights Corner)
~Registers: 16 × 256-bit YMM → 32 × 512-bit
~Operations: 256-bit floats, VEX encoding → 512-bit vectors (incompatible with AVX-512)