Intel CPU v6.0.1
Intel Pentium (P54C)
Metadata
| Property | Value |
|---|---|
| Brand | Pentium |
| Intel name | Intel Pentium (P54C) |
| Codename | P54C |
| Generation | P5 (Pentium) |
| Microarchitecture | P5 (superscalar) |
| Performance class | Pentium |
| Released | 1994-031994 |
| Data width | 32-bit |
| Address width | 32-bit |
| Base clock | 75 MHz |
| Max clock | 200 MHz |
| Cache | 16 KB L1 |
| Transistors | 3,200,000 |
| Socket | Socket 7 |
| Features | |
| Source | Curated (historical-cpus.json) |
Uses (dependencies)
- lithography: Intel Lithography
v6.0.0(600 nm BiCMOS)
Used by (0)
Nothing depends on this version.
Changelog
Since the previous patch: Intel CPU v6.0.0 (Pentium (P5))
Breaking changes
- ~Socket changed from Socket 4 to Socket 7
Features
- +Clock multiplier
- +On-die APIC
Specifications
- ~Codename: P5 → P54C
- ~Base clock: 60 MHz → 75 MHz
- ~Max clock: 66 MHz → 200 MHz
- ~Transistors: 3,100,000 → 3,200,000
Since the previous major (previous generation): Intel CPU v5.0.0 (486SX)
Breaking changes
- ~Socket changed from Socket 1 to Socket 7
Features
- +On-die x87 FPU
- +Superscalar (dual pipeline)
- +64-bit data bus
- +Clock multiplier
- +On-die APIC
Specifications
- +Codename: P54C
- ~Microarchitecture: i486 (pipelined, on-die FPU) → P5 (superscalar)
- ~Base clock: 16 MHz → 75 MHz
- ~Max clock: 33 MHz → 200 MHz
- ~Cache: 8 KB L1 → 16 KB L1
- ~Transistors: 1,185,000 → 3,200,000