Intel CPU v6.0.0
Intel Pentium (P5)
Metadata
| Property | Value |
|---|---|
| Brand | Pentium |
| Intel name | Intel Pentium (P5) |
| Codename | P5 |
| Generation | P5 (Pentium) |
| Microarchitecture | P5 (superscalar) |
| Performance class | Pentium |
| Released | 1993-031993 |
| Data width | 32-bit |
| Address width | 32-bit |
| Base clock | 60 MHz |
| Max clock | 66 MHz |
| Cache | 16 KB L1 |
| Transistors | 3,100,000 |
| Socket | Socket 4 |
| Features | |
| Source | Curated (historical-cpus.json) |
Uses (dependencies)
- lithography: Intel Lithography
v5.0.0(800 nm BiCMOS)
Used by (0)
Nothing depends on this version.
Changelog
Since the previous major (previous generation): Intel CPU v5.0.0 (486SX)
Breaking changes
- ~Socket changed from Socket 1 to Socket 4
Features
- +On-die x87 FPU
- +Superscalar (dual pipeline)
- +64-bit data bus
Specifications
- +Codename: P5
- ~Microarchitecture: i486 (pipelined, on-die FPU) → P5 (superscalar)
- ~Base clock: 16 MHz → 60 MHz
- ~Max clock: 33 MHz → 66 MHz
- ~Cache: 8 KB L1 → 16 KB L1
- ~Transistors: 1,185,000 → 3,100,000