Intel CPU v7.0.3

Intel Celeron Processor 433 MHz, 128K Cache, 66 MHz FSB

minor
0
patch
3
Celeron 433 MHz, 128K Cache, 66 MHz FSB
suffix
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No suffix

Metadata

PropertyValue
BrandCeleron
Intel nameIntel Celeron Processor 433 MHz, 128K Cache, 66 MHz FSB
CodenameMendocino
GenerationP6 (Pentium Pro/II/III)
MicroarchitectureP6 (out-of-order)
Performance classCeleron
SegmentDesktop
Released1999-Q21999
StatusDiscontinued
Cores1
Base clock433 MHz
Cache128 KB L2 Cache
Bus66 MHz
TDP24.1 W
Lithography (as published)250 nm
Transistors19 million
Die size154 mm2
Instruction set32-bit
SocketPPGA370. SEPP540PGA370. SEPP540
Instruction sets
Features
SourceIntel ARK (via cpu-spec-dataset)

Uses (dependencies)

Used by (0)

Nothing depends on this version.

Known vulnerabilities and defects

  • Meltdown (CVE-2017-5754): Rogue data cache load: user code can read kernel memory through speculative execution.
  • Spectre variant 1 (bounds check bypass) (CVE-2017-5753): Mistrained conditional branches speculatively read out-of-bounds data. Mitigated in software only; every speculative out-of-order core is affected.

Matched by codename; individual steppings may differ.

Changelog

Since the previous patch: Intel CPU v7.0.2 (Celeron 366 MHz, 128K Cache, 66 MHz FSB)

Breaking changes

  • ~Socket changed from PPGA370. SEPP242 to PPGA370. SEPP540

Specifications

  • ~Base clock: 366 MHz → 433 MHz
  • ~TDP: 21.7 W → 24.1 W

Since the previous major (previous generation): Intel CPU v6.0.2 (Pentium MMX)

Breaking changes

  • ~Socket changed from Socket 7 to PPGA370. SEPP540

Security

  • !Introduced: Meltdown
  • !Introduced: Spectre variant 1 (bounds check bypass)

Instruction sets

  • +SSE

Features

  • +Physical Address Extension
  • −Protected mode
  • −Memory management unit
  • −32-bit (IA-32)
  • −Paging
  • −Virtual 8086 mode
  • −On-die L1 cache
  • −On-die x87 FPU
  • −Superscalar (dual pipeline)
  • −64-bit data bus
  • −Clock multiplier
  • −On-die APIC

Specifications

  • ~Codename: P55C → Mendocino
  • ~Microarchitecture: P5 (superscalar) → P6 (out-of-order)
  • +Cores: 1
  • ~Base clock: 166 MHz → 433 MHz
  • ~Cache: 32 KB L1 → 128 KB L2 Cache
  • +Bus: 66 MHz
  • +TDP: 24.1 W
  • ~Transistors: 4,500,000 → 19 million
  • +Die size: 154 mm2
  • +Instruction set: 32-bit
  • −Data width: 32-bit
  • −Address width: 32-bit
  • −Max clock: 233 MHz

Raw source data

Show all 35 fields
FieldValue
CpuId27187
CpuNameIntel Celeron Processor 433 MHz, 128K Cache, 66 MHz FSB
BornOnDateQ2'99
Bus66 MHz
Cache128 KB L2 Cache
ClockSpeed433 MHz
CodeNameTextProducts formerly Mendocino
CoreCount1
CoreVoltage2.0V
DemandBasedSwitchingNo
DieSize154 mm2
ECCMemoryNo
EM64No
EmbeddedYes
ExecuteDisableNo
FSBParityNo
HaltStateNo
HyperThreadingNo
InstructionSet32-bit
Lithography250 nm
MarketSegmentDesktop
MaxTDP24.1 W
PackageSize49mm x 49mm
PhysicalAddressExtension32-bit
ProductGroupLegacy Intel Celeron Processor
ServicingStatusEnd of Servicing Lifetime
SocketsSupportedPPGA370. SEPP540
SpeedstepTechnologyNo
StatusCodeTextDiscontinued
TBTVersionNo
TCase85°C
TransistorCount19 million
TXTNo
VTXNo
SourceUrlhttps://ark.intel.com/content/www/us/en/ark/products/27187/intel-celeron-processor-433-mhz-128k-cache-66-mhz-fsb.html