Intel CPU v8.1.0
Intel Pentium 4 (Willamette)
Metadata
| Property | Value |
|---|---|
| Brand | Pentium |
| Intel name | Intel Pentium 4 (Willamette) |
| Codename | Willamette |
| Generation | NetBurst (Pentium 4) |
| Microarchitecture | NetBurst |
| Performance class | Pentium |
| Released | 2000-112000 |
| Data width | 32-bit |
| Address width | 36-bit |
| Base clock | 1.30 GHz |
| Max clock | 2.00 GHz |
| Cache | 256 KB L2 |
| Transistors | 42,000,000 |
| Socket | Socket 423 |
| Instruction sets | |
| Features | |
| Source | Curated (historical-cpus.json) |
Uses (dependencies)
- lithography: Intel Lithography
v9.0.0(180 nm) - simd: Intel SIMD
v0.0.1(MMX) - simd: Intel SIMD
v1.1.0(SSE2)
Used by (0)
Nothing depends on this version.
Known vulnerabilities and defects
- Meltdown (CVE-2017-5754): Rogue data cache load: user code can read kernel memory through speculative execution.
- Spectre variant 1 (bounds check bypass) (CVE-2017-5753): Mistrained conditional branches speculatively read out-of-bounds data. Mitigated in software only; every speculative out-of-order core is affected.
Matched by codename; individual steppings may differ.
Changelog
Since the previous minor (lower performance class): Intel CPU v8.0.0 (Celeron 1.70 GHz, 128K Cache, 400 MHz FSB)
Breaking changes
- ~Socket changed from PPGA478 to Socket 423
Features
- +Protected mode
- +Memory management unit
- +32-bit (IA-32)
- +Paging
- +Virtual 8086 mode
- +On-die L1 cache
- +On-die x87 FPU
- +Out-of-order execution
Specifications
- ~Codename: Northwood → Willamette
- +Data width: 32-bit
- +Address width: 36-bit
- ~Base clock: 1.70 GHz → 1.30 GHz
- +Max clock: 2.00 GHz
- ~Cache: 128 KB L2 Cache → 256 KB L2
- ~Transistors: 55 million → 42,000,000
- −Cores: 1
- −Bus: 400 MHz
- −TDP: 63.5 W
- −Die size: 131 mm2
- −Instruction set: 32-bit
Since the previous major (previous generation): Intel CPU v7.1.0 (Pentium Pro)
Breaking changes
- ~Socket changed from Socket 8 to Socket 423
Security
- !Introduced: Meltdown
Components
Instruction sets
- +SSE2
Specifications
- ~Codename: P6 → Willamette
- ~Microarchitecture: P6 (out-of-order) → NetBurst
- ~Base clock: 150 MHz → 1.30 GHz
- ~Max clock: 200 MHz → 2.00 GHz
- ~Cache: 16 KB L1, 256 KB–1 MB L2 (in package) → 256 KB L2
- ~Transistors: 5,500,000 → 42,000,000