Intel CPU v8.1.10-J
Intel Pentium 4 Processor 505/505J
patch
10
Pentium 4 505/505J
Metadata
| Property | Value |
|---|---|
| Brand | Pentium |
| Intel name | Intel Pentium 4 Processor 505/505J |
| Processor number | 505J |
| Codename | Prescott |
| Generation | NetBurst (Pentium 4) |
| Microarchitecture | NetBurst |
| Performance class | Pentium |
| Segment | Desktop |
| Released | 2005-Q12005 |
| Status | Discontinued |
| Cores | 1 |
| Base clock | 2.66 GHz |
| Cache | 1 MB L2 Cache |
| Bus | 533 MHz |
| TDP | 84 W |
| Lithography (as published) | 90 nm |
| Transistors | 125 million |
| Die size | 112 mm2 |
| Instruction set | 64-bit |
| Socket | PLGA775LGA775 |
| Instruction sets | |
| Features | |
| Source | Intel ARK (via cpu-spec-dataset) |
Uses (dependencies)
- lithography: Intel Lithography
v11.0.0(90 nm) - simd: Intel SIMD
v0.0.1(MMX) - simd: Intel SIMD
v1.1.0(SSE2)
Used by (0)
Nothing depends on this version.
Known vulnerabilities and defects
- Meltdown (CVE-2017-5754): Rogue data cache load: user code can read kernel memory through speculative execution.
- Spectre variant 1 (bounds check bypass) (CVE-2017-5753): Mistrained conditional branches speculatively read out-of-bounds data. Mitigated in software only; every speculative out-of-order core is affected.
Matched by codename; individual steppings may differ.
Changelog
Since the previous patch: Intel CPU v8.1.9 (Pentium 4 supporting HT Technology 3.40 GHz, 1M Cache, 800 MHz FSB)
Features
- +Intel 64
- +Execute Disable Bit
- −Hyper-Threading
Specifications
- ~Base clock: 3.40 GHz → 2.66 GHz
- ~Bus: 800 MHz → 533 MHz
- ~TDP: 103 W → 84 W
- ~Instruction set: 32-bit → 64-bit
Since the previous minor (lower performance class): Intel CPU v8.0.10-J (Celeron D 340J)
Breaking changes
- ~Socket changed from PLGA775. PLGA478. PPGA478 to PLGA775
Features
- +Intel 64
- −Physical Address Extension
Specifications
- ~Base clock: 2.93 GHz → 2.66 GHz
- ~Cache: 256 KB L2 Cache → 1 MB L2 Cache
- ~Instruction set: 32-bit → 64-bit
- −Recommended price: $117
Since the previous major (previous generation): Intel CPU v7.1.9 (Pentium III 1.00 GHz, 256K Cache, 100 MHz FSB)
Breaking changes
- ~Socket changed from PPGA370. SECC2495 to PLGA775
Components
Instruction sets
- +SSE2
Features
- +Intel 64
- +Execute Disable Bit
Specifications
- ~Codename: Coppermine → Prescott
- ~Microarchitecture: P6 (out-of-order) → NetBurst
- ~Base clock: 1.00 GHz → 2.66 GHz
- ~Cache: 256 KB L2 Cache → 1 MB L2 Cache
- ~Bus: 100 MHz → 533 MHz
- ~TDP: 29 W → 84 W
- +Transistors: 125 million
- +Die size: 112 mm2
- ~Instruction set: 32-bit → 64-bit
Raw source data
Show all 28 fields
| Field | Value |
|---|---|
| CpuId | 27450 |
| CpuName | Intel Pentium 4 Processor 505/505J |
| BornOnDate | Q1'05 |
| Bus | 533 MHz |
| Cache | 1 MB L2 Cache |
| ClockSpeed | 2.66 GHz |
| CodeNameText | Products formerly Prescott |
| CoreCount | 1 |
| CoreVoltage | 1.25V-1.400V |
| DieSize | 112 mm2 |
| EM64 | Yes |
| Embedded | Yes |
| ExecuteDisable | Yes |
| HaltState | No |
| InstructionSet | 64-bit |
| Lithography | 90 nm |
| MarketSegment | Desktop |
| MaxTDP | 84 W |
| ProcessorNumber | 505J |
| ProductGroup | Legacy Intel Pentium Processor |
| ServicingStatus | End of Servicing Updates |
| SocketsSupported | PLGA775 |
| StatusCodeText | Discontinued |
| TBTVersion | No |
| TCase | 67.7°C |
| TransistorCount | 125 million |
| VTX | No |
| SourceUrl | https://ark.intel.com/content/www/us/en/ark/products/27450/intel-pentium-4-processor-505505j-1m-cache-2-66-ghz-533-mhz-fsb.html |