Intel Server CPU v1.0.0
Intel Xeon Processor LV 1.60 GHz, 512K Cache, 400 MHz FSB
Metadata
| Property | Value |
|---|---|
| Brand | Xeon |
| Intel name | Intel Xeon Processor LV 1.60 GHz, 512K Cache, 400 MHz FSB |
| Codename | Prestonia |
| Generation | NetBurst |
| Microarchitecture | NetBurst |
| Performance class | Xeon |
| Segment | Server |
| Released | 2002-Q32002 |
| Status | Discontinued |
| Cores | 1 |
| Base clock | 1.60 GHz |
| Cache | 512 KB L2 Cache |
| Bus | 400 MHz |
| TDP | 30 W |
| Lithography (as published) | 130 nm |
| Transistors | 55 million |
| Die size | 131 mm2 |
| Instruction set | 32-bit |
| Instruction sets | |
| Features | |
| Source | Intel ARK (via cpu-spec-dataset) |
Uses (dependencies)
- lithography: Intel Lithography
v10.0.0(130 nm) - simd: Intel SIMD
v0.0.1(MMX) - simd: Intel SIMD
v1.1.0(SSE2)
Used by (0)
Nothing depends on this version.
Known vulnerabilities and defects
- Meltdown (CVE-2017-5754): Rogue data cache load: user code can read kernel memory through speculative execution.
- Spectre variant 1 (bounds check bypass) (CVE-2017-5753): Mistrained conditional branches speculatively read out-of-bounds data. Mitigated in software only; every speculative out-of-order core is affected.
Matched by codename; individual steppings may differ.
Changelog
Since the previous major (previous generation): Intel Server CPU v0.0.1 (Pentium III - S 800 MHz, 512K Cache, 133 MHz FSB)
Components
Instruction sets
- +SSE2
Features
- +Hyper-Threading
Specifications
- ~Codename: Tualatin → Prestonia
- ~Microarchitecture: P6 → NetBurst
- ~Base clock: 800 MHz → 1.60 GHz
- ~Bus: 133 MHz → 400 MHz
- ~TDP: 10.63 W → 30 W
- +Transistors: 55 million
- +Die size: 131 mm2
Raw source data
Show all 32 fields
| Field | Value |
|---|---|
| CpuId | 27289 |
| CpuName | Intel Xeon Processor LV 1.60 GHz, 512K Cache, 400 MHz FSB |
| BornOnDate | Q3'02 |
| Bus | 400 MHz |
| Cache | 512 KB L2 Cache |
| ClockSpeed | 1.60 GHz |
| CodeNameText | Products formerly Prestonia |
| CoreCount | 1 |
| CoreVoltage | 1.187V-1.274V |
| DemandBasedSwitching | No |
| DieSize | 131 mm2 |
| EM64 | No |
| Embedded | No |
| ExecuteDisable | No |
| FSBParity | Yes |
| HaltState | No |
| HyperThreading | Yes |
| InstructionSet | 32-bit |
| Lithography | 130 nm |
| MarketSegment | Server |
| MaxTDP | 30 W |
| PackageSize | 42.5mm x 42.5mm |
| ProductGroup | Legacy Intel Xeon Processors |
| ServicingStatus | End of Servicing Lifetime |
| SpeedstepTechnology | No |
| StatusCodeText | Discontinued |
| TBTVersion | No |
| TCase | 81°C |
| TransistorCount | 55 million |
| TXT | No |
| VTX | No |
| SourceUrl | https://ark.intel.com/content/www/us/en/ark/products/27289/intel-xeon-processor-lv-1-60-ghz-512k-cache-400-mhz-fsb.html |