Intel CPU v7.0.1
Intel Celeron Processor 300 MHz, 128K Cache, 66 MHz FSB
patch
1
Celeron 300 MHz, 128K Cache, 66 MHz FSB
suffix
—
No suffix
Metadata
| Property | Value |
|---|---|
| Brand | Celeron |
| Intel name | Intel Celeron Processor 300 MHz, 128K Cache, 66 MHz FSB |
| Codename | Mendocino |
| Generation | P6 (Pentium Pro/II/III) |
| Microarchitecture | P6 (out-of-order) |
| Performance class | Celeron |
| Segment | Desktop |
| Released | 1999-Q11999 |
| Status | Discontinued |
| Cores | 1 |
| Base clock | 300 MHz |
| Cache | 128 KB L2 Cache |
| Bus | 66 MHz |
| TDP | 17.8 W |
| Lithography (as published) | 250 nm |
| Transistors | 19 million |
| Die size | 154 mm2 |
| Instruction set | 32-bit |
| Socket | SEPP242. PPGA370. SEPP540 |
| Instruction sets | |
| Features | |
| Source | Intel ARK (via cpu-spec-dataset) |
Uses (dependencies)
- lithography: Intel Lithography
v8.0.0(250 nm) - simd: Intel SIMD
v0.0.1(MMX) - simd: Intel SIMD
v1.0.0(SSE)
Used by (0)
Nothing depends on this version.
Known vulnerabilities and defects
- Meltdown (CVE-2017-5754): Rogue data cache load: user code can read kernel memory through speculative execution.
- Spectre variant 1 (bounds check bypass) (CVE-2017-5753): Mistrained conditional branches speculatively read out-of-bounds data. Mitigated in software only; every speculative out-of-order core is affected.
Matched by codename; individual steppings may differ.
Changelog
Since the previous patch: Intel CPU v7.0.0 (Celeron (Covington))
Breaking changes
- ~Socket changed from Slot 1 to SEPP242. PPGA370. SEPP540
Components
Instruction sets
- +SSE
Features
- −Protected mode
- −Memory management unit
- −32-bit (IA-32)
- −Paging
- −Virtual 8086 mode
- −On-die L1 cache
- −On-die x87 FPU
- −Out-of-order execution
Specifications
- ~Codename: Covington → Mendocino
- +Cores: 1
- ~Base clock: 266 MHz → 300 MHz
- ~Cache: 32 KB L1, no L2 → 128 KB L2 Cache
- +Bus: 66 MHz
- +TDP: 17.8 W
- ~Transistors: 7,500,000 → 19 million
- +Die size: 154 mm2
- +Instruction set: 32-bit
- −Data width: 32-bit
- −Address width: 36-bit
- −Max clock: 300 MHz
Since the previous major (previous generation): Intel CPU v6.0.1 (Pentium (P54C))
Breaking changes
- ~Socket changed from Socket 7 to SEPP242. PPGA370. SEPP540
Security
- !Introduced: Meltdown
- !Introduced: Spectre variant 1 (bounds check bypass)
Components
Instruction sets
- +MMX
- +SSE
Features
- +Physical Address Extension
- −Protected mode
- −Memory management unit
- −32-bit (IA-32)
- −Paging
- −Virtual 8086 mode
- −On-die L1 cache
- −On-die x87 FPU
- −Superscalar (dual pipeline)
- −64-bit data bus
- −Clock multiplier
- −On-die APIC
Specifications
- ~Codename: P54C → Mendocino
- ~Microarchitecture: P5 (superscalar) → P6 (out-of-order)
- +Cores: 1
- ~Base clock: 75 MHz → 300 MHz
- ~Cache: 16 KB L1 → 128 KB L2 Cache
- +Bus: 66 MHz
- +TDP: 17.8 W
- ~Transistors: 3,200,000 → 19 million
- +Die size: 154 mm2
- +Instruction set: 32-bit
- −Data width: 32-bit
- −Address width: 32-bit
- −Max clock: 200 MHz
Raw source data
Show all 35 fields
| Field | Value |
|---|---|
| CpuId | 27183 |
| CpuName | Intel Celeron Processor 300 MHz, 128K Cache, 66 MHz FSB |
| BornOnDate | Q1'99 |
| Bus | 66 MHz |
| Cache | 128 KB L2 Cache |
| ClockSpeed | 300 MHz |
| CodeNameText | Products formerly Mendocino |
| CoreCount | 1 |
| CoreVoltage | 2.0V |
| DemandBasedSwitching | No |
| DieSize | 154 mm2 |
| ECCMemory | No |
| EM64 | No |
| Embedded | Yes |
| ExecuteDisable | No |
| FSBParity | No |
| HaltState | No |
| HyperThreading | No |
| InstructionSet | 32-bit |
| Lithography | 250 nm |
| MarketSegment | Desktop |
| MaxTDP | 17.8 W |
| PackageSize | 49mm x 49mm |
| PhysicalAddressExtension | 32-bit |
| ProductGroup | Legacy Intel Celeron Processor |
| ServicingStatus | End of Servicing Lifetime |
| SocketsSupported | SEPP242. PPGA370. SEPP540 |
| SpeedstepTechnology | No |
| StatusCodeText | Discontinued |
| TBTVersion | No |
| TCase | 85°C |
| TransistorCount | 19 million |
| TXT | No |
| VTX | No |
| SourceUrl | https://ark.intel.com/content/www/us/en/ark/products/27183/intel-celeron-processor-300-mhz-128k-cache-66-mhz-fsb.html |