Intel Server CPU v11.0.6-I
Intel Xeon D-2161I Processor
Metadata
| Property | Value |
|---|---|
| Brand | Xeon |
| Intel name | Intel Xeon D-2161I Processor |
| Processor number | D-2161I |
| Codename | Skylake |
| Generation | Skylake (Xeon Scalable 1st gen) |
| Microarchitecture | Skylake |
| Performance class | Xeon D |
| Segment | Server |
| Released | 2018-Q12018 |
| Status | Launched |
| Cores | 12 |
| Threads | 24 |
| Base clock | 2.20 GHz |
| Max clock | 3.00 GHz |
| Cache | 16.5 MB L2 Cache |
| TDP | 90 W |
| Lithography (as published) | 14 nm |
| Max memory | 512 GB |
| Memory channels | 4 |
| PCIe revision | 3.0 |
| PCIe lanes | 32 |
| Max CPUs per system | 1 |
| Instruction set | 64-bit |
| Socket | FCBGA2518BGA2518 |
| Memory | DDR4 |
| Recommended price | $962 |
| Instruction sets | |
| Features | |
| Source | Intel ARK (via cpu-spec-dataset) |
Uses (dependencies)
- lithography: Intel Lithography
v16.0.0(14 nm) - simd: Intel SIMD
v0.0.1(MMX) - simd: Intel SIMD
v1.4.1(SSE4.2) - simd: Intel SIMD
v2.2.0(AVX-512)
Used by (0)
Nothing depends on this version.
Known vulnerabilities and defects
- Meltdown (CVE-2017-5754): Rogue data cache load: user code can read kernel memory through speculative execution.
- Spectre variant 1 (bounds check bypass) (CVE-2017-5753): Mistrained conditional branches speculatively read out-of-bounds data. Mitigated in software only; every speculative out-of-order core is affected.
- Foreshadow / L1 Terminal Fault (CVE-2018-3615, CVE-2018-3620, CVE-2018-3646): Speculative reads from the L1 data cache through non-present page table entries, breaking SGX, OS and VMM isolation.
- Microarchitectural Data Sampling (ZombieLoad, RIDL, Fallout) (CVE-2018-12126, CVE-2018-12127, CVE-2018-12130, CVE-2019-11091): Data in store buffers, fill buffers and load ports leaks across privilege boundaries.
- Special Register Buffer Data Sampling (CrossTalk) (CVE-2020-0543): RDRAND/RDSEED results leak across cores through a shared staging buffer.
- Retbleed (CVE-2022-29901): Return instructions are hijacked through the branch target buffer on cores without enhanced IBRS.
- Downfall / Gather Data Sampling (CVE-2022-40982): The AVX gather instruction leaks stale data from internal vector registers.
Matched by codename; individual steppings may differ.
Changelog
Since the previous patch: Intel Server CPU v11.0.5-NT (Xeon D-2146NT)
Features
- −QuickAssist
Specifications
- ~Cores: 8 → 12
- ~Threads: 16 → 24
- ~Base clock: 2.30 GHz → 2.20 GHz
- ~Cache: 11 MB → 16.5 MB L2 Cache
- ~TDP: 80 W → 90 W
- ~Recommended price: $641 → $962
Since the previous major (previous generation): Intel Server CPU v10.0.6 (Xeon D-1528)
Breaking changes
- ~Socket changed from FCBGA1667 to FCBGA2518
Security
- !Introduced: Downfall / Gather Data Sampling
Components
Instruction sets
- +AVX-512
Features
- +MPX
- −Turbo Boost 2.0
Specifications
- ~Codename: Broadwell → Skylake
- ~Microarchitecture: Broadwell → Skylake
- ~Cores: 6 → 12
- ~Threads: 12 → 24
- ~Base clock: 1.90 GHz → 2.20 GHz
- ~Max clock: 2.50 GHz → 3.00 GHz
- ~Cache: 9 MB → 16.5 MB L2 Cache
- ~TDP: 35 W → 90 W
- ~Max memory: 128 GB → 512 GB
- ~Memory channels: 2 → 4
- ~PCIe revision: 2.0/3.0 → 3.0
- ~Recommended price: $389 → $962
Raw source data
Show all 57 fields
| Field | Value |
|---|---|
| CpuId | 136435 |
| CpuName | Intel Xeon D-2161I Processor |
| AESTech | Yes |
| AVX512FusedMultiplyAddUnits | 1 |
| BornOnDate | Q1'18 |
| Cache | 16.5 MB L2 Cache |
| ClockSpeed | 2.20 GHz |
| ClockSpeedMax | 3.00 GHz |
| CodeNameText | Products formerly Skylake |
| CoreCount | 12 |
| DeviceProtectionTechBootGuardVersion | Yes |
| ECCMemory | Yes |
| EM64 | Yes |
| Embedded | No |
| ESUDate | Sunday. December 31. 2023 |
| ExecuteDisable | Yes |
| ExtendedPageTables | Yes |
| HaltState | Yes |
| HyperThreading | Yes |
| InstructionSet | 64-bit |
| InstructionSetExtensions | Intel AVX2. Intel AVX-512 |
| Lithography | 14 nm |
| MarketSegment | Server |
| MaxCPUs | 1 |
| MaxMem | 512 GB |
| MaxTDP | 90 W |
| MemoryMaxSpeedMhz | 2133 MHz |
| MemoryProtectionExtensionsVersion | Yes |
| MemoryTypes | DDR4 |
| NumMemoryChannels | 4 |
| NumPCIExpressPorts | 32 |
| OptaneMemorySupport | No |
| OSGuardTechVersion | Yes |
| PCIExpressConfigs | > |
| PCIExpressRevision | 3.0 |
| ProcessorNumber | D-2161I |
| ProductBriefUrl | View now |
| ProductGroup | Intel Xeon D Processor |
| QuickAssistTechnology | No |
| ScalableSockets | 1S Only |
| SecureKeyTechVersion | Yes |
| ServicingStatus | ESU Notification Issued |
| SocketsSupported | FCBGA2518 |
| SoftwareGuardExtensions | No |
| SpeedstepTechnology | Yes |
| StatusCodeText | Launched |
| TBTVersion | 2.0 |
| ThermalMonitoring2Indicator | Yes |
| ThreadCount | 24 |
| TransactionalSynchronizationExtensionVersion | Yes |
| TurboBoostMaxTechVersion | No |
| TXT | Yes |
| UltraPathInterconnectLinks | 0 |
| VolumeManagementDeviceVersion | Yes |
| VTD | Yes |
| VTX | Yes |
| SourceUrl | https://ark.intel.com/content/www/us/en/ark/products/136435/intel-xeon-d2161i-processor-16-5m-cache-2-20-ghz.html |